Recently, the research team led by Professors Yuan Du and Li Du from Nanjing University has made a major breakthrough in the field of high-speed integrated circuit interconnection. In collaboration with the research team of T-Head (Shanghai) Semiconductor Co., Ltd., the team's relevant research findings, entitledA 47.0Tb/s/mm 112Gb/s/pin PAM4 Single-Ended Transceiver Featuring 4-Aggressor Crosstalk Cancellation and Supply-Noise Tolerance for Short-Reach Memory Interfaces, were presented at the 2026 IEEE International Solid-State Circuits Conference (ISSCC), the top international conference in the field of integrated circuits. This achievement has set a world record for an ultra-high edge bandwidth density of 47.0Tb/s/mm. The related technologies have been applied to the R&D of interfaces for AI computing chiplets and HBM memory chiplets, and the corresponding products have been featured on CCTV News, providing core technical support for domestic AI chips to benchmark international advanced levels.

Figure 1 The research team led by Professors Yuan Du and Li Du from the School of Electronic Science and Engineering, Nanjing University, presenting their paper at ISSCC 2026